In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve these high densities there have been, and continue to be, efforts toward scaling down (e.g., to submicron levels) device dimensions on semiconductor wafers. In order to accomplish such high device packing density, smaller and smaller features sizes are required. These features sizes include the width and spacing of interconnecting lines, and the spacing and diameter of metal contact vias.
Further, the use of and demand for semiconductor devices are increasing. Constant development of these devices requires constant improvements in size, performance and yield. These improvements are accomplished by improving the various processes used in semiconductor fabrication. Processes involving metal are often a challenge for sort yield and process control.
Metallization is one of the processes used in semiconductor fabrication. Metallization generally involves forming metal structures including metal layers, interconnects, conductive lines, charge retention layers, passive layers, contacts and plugs. These metal structures are vital to the function of semiconductor devices. The reliability, speed, and efficiency of semiconductor devices is directly linked to the quality of metal structures formed therein.
For example, some metallization processes involve depositing a metal in a trench or via. The metal filled via or trench may undesirably contain voids. Voids lower the conductivity of the metal structure, and thus deleteriously affect the speed and reliability of a semiconductor device.
Referring to FIG. 1, a cross sectional view of a memory cell 100 illustrating void formation is shown. The memory cell 100 contains a semiconductor substrate 102, a dielectric layer 104 with an opening 106, a metal 108 deposited into the opening 106, and a conductivity facilitating layer 110 overlying the metal layer. Often, voids 112 form in the top region of the metal 108. These voids result in an uneven formation of overlying metal layers 110. The voids also detrimentally affect the performance of memory cells. Thus, there remains an unmet need in the art for improved methods of eliminating voids.